diff --git a/Hardware/Logic_Gates/Logic_gates.md b/Hardware/Logic_Gates/Logic_gates.md
index 030121f..3eb9b49 100644
--- a/Hardware/Logic_Gates/Logic_gates.md
+++ b/Hardware/Logic_Gates/Logic_gates.md
@@ -19,6 +19,8 @@ Physically, what 'travels through' the gates is electrical current and what cons
 
 ### Symbol
 
+![](/img/not-gate-new.png)
+
 ### Truth conditions
 
 | P   | ~ P |
@@ -34,6 +36,8 @@ Physically, what 'travels through' the gates is electrical current and what cons
 
 ### Symbol
 
+![](/img/and-gate-new-2.png)
+
 ### Truth conditions
 
 | P   | Q   | P & Q |
@@ -51,6 +55,8 @@ Physically, what 'travels through' the gates is electrical current and what cons
 
 ### Symbol
 
+![](/img/nand-gate-new.png)
+
 ### Truth conditions
 
 | P   | Q   | ~(P & Q) |
@@ -70,6 +76,8 @@ NAND is a **universal logic gate**: equipped with just a NAND we can represent e
 
 ### Symbol
 
+![](/img/or-gate-new.png)
+
 ### Truth conditions
 
 | P   | Q   | P v Q |
@@ -87,6 +95,8 @@ NAND is a **universal logic gate**: equipped with just a NAND we can represent e
 
 ### Symbol
 
+![](/img/xor-gate-new.png)
+
 ### Truth conditions
 
 | P   | Q   | ~(P <> Q) |
@@ -104,6 +114,8 @@ NAND is a **universal logic gate**: equipped with just a NAND we can represent e
 
 ### Symbol
 
+![](/img/nor-gate-new.png)
+
 ### Truth conditions
 
 | P   | Q   | P v Q |