From c23a24e5f7477816088404d63190d83632d1de9f Mon Sep 17 00:00:00 2001 From: thomasabishop Date: Tue, 3 Jan 2023 12:00:08 +0000 Subject: [PATCH] Autosave: 2023-01-03 12:00:08 --- Computer_Architecture/Bus.md | 4 +-- .../Digital_circuits/Clock_signals.md | 7 +----- .../Digital_circuits/Latches.md | 9 +++---- .../Digital_circuits/Multiplexor.md | 12 --------- .../Digital_circuits/Multiplexors.md | 25 +++++++++++++++++++ 5 files changed, 30 insertions(+), 27 deletions(-) delete mode 100644 Electronics_and_Hardware/Digital_circuits/Multiplexor.md create mode 100644 Electronics_and_Hardware/Digital_circuits/Multiplexors.md diff --git a/Computer_Architecture/Bus.md b/Computer_Architecture/Bus.md index 8bb7208..81c5160 100644 --- a/Computer_Architecture/Bus.md +++ b/Computer_Architecture/Bus.md @@ -13,9 +13,7 @@ Note that the use of the word "bus" varies somewhat in points of emphasis. A bus - The physical wires that make up the bus - The logical communication channel that is established over those wires -- The collection of bits themselves that travel along the wires conceived as a single entity - -This last definition is closes to the Latin origin of the term: _omnibus_ which means _for many_. +- TheBany\_. ## Main buses diff --git a/Electronics_and_Hardware/Digital_circuits/Clock_signals.md b/Electronics_and_Hardware/Digital_circuits/Clock_signals.md index 15b3f6c..54320c2 100644 --- a/Electronics_and_Hardware/Digital_circuits/Clock_signals.md +++ b/Electronics_and_Hardware/Digital_circuits/Clock_signals.md @@ -10,12 +10,7 @@ tags: [binary, memory, clock, electromagnetism] In the examples of digital circuits so far (i.e [adders](/Electronics_and_Hardware/Digital_circuits/Half_adder_and_full_adder.md) and [latches](/Electronics_and_Hardware/Digital_circuits/Latches.md)) everything happens in a single instant or over several repeated instances. This is because of how simple the circuits are. In the case of latches only a single bit is updated. And even with rippled adders they are just a series of 1-bit updaters in a chain. -With more complex circuits that use multiple memory devices which store a series of bits at once, we need a way to ensure that the bits are set at the same time. - -We synchronize multiple circuit components with a **clock signal**. - -A clock signal alternates its voltage level from high to low on a regular cadence where it is high half the time and low the rest of the time. This gives the wave form a squared appearence. - +With more complex circuits that use multiple memory devices which store a series of bits at once, we need a way to ensure that the bits are set at theB A single iteration of the volatage rising and falling is a **pulse**. A complete oscillation from low to high and back to low is a **cycle**. As with all [electromagnetic](/Electronics_and_Hardware/Physics_of_electricity/Electromagnetism.md) signals we measure the frequency of the wave in Hertz: cylcles per second. We also further distinguish the rising and falling edge of a pulse. Rising represents the signal passing from ground to its maximum voltage and falling is the reverse (the electrons moving from the voltage source to ground). The diagram below shows a pulse cycle of 2Hz. diff --git a/Electronics_and_Hardware/Digital_circuits/Latches.md b/Electronics_and_Hardware/Digital_circuits/Latches.md index ec27d5d..ef68754 100644 --- a/Electronics_and_Hardware/Digital_circuits/Latches.md +++ b/Electronics_and_Hardware/Digital_circuits/Latches.md @@ -27,12 +27,9 @@ The SR Latch goes through the following state changes: This is represented more clearly in the table below: -| S | R | Q | Operation | -| --- | --- | ----------------------- | ------------- | -| 0 | 0 | Maintain previous value | Hold | -| 0 | 1 | 0 | Reset | -| 1 | 0 | 1 | Set | -| 1 | 1 | X | Invalid, null | +| S | R | Q | Operation | +| --- | --- | ----------------------- | --------- | +| 1 | 1 | X | Invalid, null | The most succinct account of a latch: diff --git a/Electronics_and_Hardware/Digital_circuits/Multiplexor.md b/Electronics_and_Hardware/Digital_circuits/Multiplexor.md deleted file mode 100644 index 5b09ce8..0000000 --- a/Electronics_and_Hardware/Digital_circuits/Multiplexor.md +++ /dev/null @@ -1,12 +0,0 @@ ---- -categories: - - Electronics - - Hardware -tags: [logic-gates, binary, nand-to-tetris] ---- - -# Multiplexor (MUX) - -A multiplexor takes two inputs (A,B) plus a third input SEL (for "select"). Applying a value to SEL toggles the output between A and B. - -Multiplexers can be used to build larger circuits by connecting the output of one multiplexer to the input of another. They are often used to implement data selection and switching in digital systems diff --git a/Electronics_and_Hardware/Digital_circuits/Multiplexors.md b/Electronics_and_Hardware/Digital_circuits/Multiplexors.md new file mode 100644 index 0000000..f6a6a2a --- /dev/null +++ b/Electronics_and_Hardware/Digital_circuits/Multiplexors.md @@ -0,0 +1,25 @@ +--- +categories: + - Electronics + - Hardware +tags: [logic-gates, binary, nand-to-tetris] +--- + +# Multiplexors (MUX) + +A multiplexor takes two inputs (A,B) plus a third input SEL (for "select"). Applying a value to SEL toggles the output between A and B. + +Multiplexers can be used to build larger circuits by connecting the output of one multiplexer to the input of another. They are often used to implement data selection and switching in digital systems + +``` +if (sel==0) + out=a +else + out=b +``` + + + +## Programable gates + +One of the main use cases of multiplexors is to implement programmable gates. These are gates where the logic can be switched. For example an ANDMUXOR gate uses the SEL value to toggle the operation of a gate between AND and OR for its two inputs A and B