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binary: further notes on twos complement

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thomasabishop 2023-07-05 08:12:26 +01:00
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Electronics_and_Hardware/Binary/Signed_and_unsigned_numbers.md
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@ -10,7 +10,7 @@ In order to represent negative integers in binary we use signed numbers. **Signe
In order to represent negative integers alonside positive integers a natural approach is to divide the available [encoding space / word length](/Electronics_and_Hardware/Binary/Binary_encoding.md) into two subsets: one for representing non-negative integers and one for representing negative integers.
The primary method for doing this is to use _two's complement_. This method allows for signed numbers in a way that complicates the hardware implementation of the binary arithmetic operations as little as possible.
The primary method for doing this is to use _two's complement_. This method makes signed numbers possible in a way that complicates the hardware implementation of the binary arithmetic operations as little as possible.
## Two's complement
@ -29,6 +29,38 @@ To translate a signed number to an unsigned number you flip them back and still
![](/_img/signed-to-unsigned.png)
### Formal expresssion: $2^n - x$
The heuristic account of deriving two's complement above can be formalised as follows:
> in a binary system that uses a word size of $n$ bits, the two's complement binary code that represents negative $x$ is taken to be the code that represents $2^n - x$
Let's demonstrate this, again using -5 as the value we wish to encode.
Applying the formula to a 4-bit system, negative 5 can be derived as follows:
$$
2^4 -5
$$
$$
16 -5 = 11
$$
$$
11 = 1011
$$
So basically we carry out the subtraction against the word length and then convert the decimal result to binary.
We can also confirm the output by noting that when the binary form of the number and its negative are added the sum will be `0000` if we ignore the overflow bit:
$$
1011 + 0101 = 0000
$$
(This makes sense if we recall that earlier we derived the complement by inverting the bits.)
### Advantages
The chief advantage of the two's complement technique of signing numbers is that its circuit implementation is no different from the adding of two unsigned numbers. Once the signing algorithm is applied the addition can be passed through an [adder](/Electronics_and_Hardware/Digital_circuits/Half_adder_and_full_adder.md) component without any special handling or additional hardware.
@ -62,16 +94,6 @@ The ease by which we conduct signed arithmetic with standard hardware contrasts
This works but it requires extra complexity to in a system's design to account for the bit that has a special meaning. Adder components would need to be modified to account for it.
## Shorthand for deriving two's complement
A simple way to work out the value of a signed number as contrasted with an unsigned number is to schematize it as follows: _the most significant place has a weight equal to the negative value of that place, and all other places have weights equal to the positive values of those places_.
Thus for a 4-bit number:
Then if we add the decimal equivalents of the place value together, we get our signed number. So in the case of $-3$:
![](/_img/signed-conversion.png)
## Considerations
A limitation of signed numbers via two's complement is that it reduces the total informational capacity of a 4-bit number. Instead 16 permutations of bits giving you sixteen integers you instead have 8 integers and 8 of their negative equivalents. So if you wanted to represent integers greater than decimal 8 you would need to increase the bit length.