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thomasabishop 2022-12-27 10:30:05 +00:00
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categories:
- Computer Architecture
- Hardware
tags: [abstraction, modules]
tags: [abstraction, modules, nand-to-tetris]
---
# Hardware abstraction and modularity

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@ -16,6 +16,18 @@ Logic gates are the basic building blocks of digital computing. **A logic gate i
Physically, what 'travels through' the gates is electrical current and what constitutes the 'gate' is a [transistor](/Electronics_and_Hardware/Digital_circuits/Transistors.md) responding to the current. Going up a level of abstraction, the current/ charge is identified with a [bit](/Electronics_and_Hardware/Binary/Binary_units_of_measurement.md#binary-units-of-measurement). It is bits that go into the gate and bits which come out: binary information that may be either 1 or 0.
## Elementary and composite gates
We distinguish elementary from composite logic gates. An elementary gate is a single gate embodying a single logical connective. It cannot be reduced any lower as a logical abstraction. A composite gate is a gate made up of more than one elementary gate and/or other composite gates.
An example of a composite gate would be a three-way AND. An AND with three inputs rather than the standard two that furnish the elementary AND gate. This gate would output 1 when all three gates have the value 1 and 0 otherwise. [Adders](/Electronics_and_Hardware/Digital_circuits/Half_adder_and_full_adder.md) and [latches](/Electronics_and_Hardware/Digital_circuits/Latches.md) whilst being [integrated circuits](/Electronics_and_Hardware/Digital_circuits/Integrated_circuits.md) are also, technically speaking, composite gates.
## Gate interface / gate implementation
The gate _interface_ is an abstraction that the enables the user to think of the gate simply in terms of inputs and outputs, without being concerned with the technical details of how this is achieved. How it is achieved is the gate _implementation_.
We can
## NOT gate
> The NOT gate inverts the value of whatever input it receives
@ -98,6 +110,8 @@ NAND is a **universal logic gate**: equipped with just a NAND we can represent e
### Interactive circuit
<iframe src="https://circuitverse.org/simulator/embed/or-gate-087e4933-7963-482d-b4bf-9e130ef05706?theme=default&display_title=false&clock_time=true&fullscreen=true&zoom_in_out=true" style="border-width:; border-style: solid; border-color:;" name="myiframe" id="projectPreview" scrolling="no" frameborder="1" marginheight="0px" marginwidth="0px" height="250" width="500" allowFullScreen></iframe>
## XOR gate
> The OR gate represents the truth conditions of the exclusive OR
@ -117,6 +131,8 @@ NAND is a **universal logic gate**: equipped with just a NAND we can represent e
### Interactive circuit
<iframe src="https://circuitverse.org/simulator/embed/xor-gate-a240131e-a9c3-4240-a52b-e14412fdd654?theme=default&display_title=false&clock_time=true&fullscreen=true&zoom_in_out=true" style="border-width:; border-style: solid; border-color:;" name="myiframe" id="projectPreview" scrolling="no" frameborder="1" marginheight="0px" marginwidth="0px" height="250" width="500" allowFullScreen></iframe>
## NOR gate
> The NOR gate inverts the function of an OR gate
@ -135,3 +151,5 @@ NAND is a **universal logic gate**: equipped with just a NAND we can represent e
| 0 | 0 | 1 |
### Interactive circuit
<iframe src="https://circuitverse.org/simulator/embed/nor-gate-ac7946b4-f5d0-4c87-afd1-a2e92326d006?theme=default&display_title=false&clock_time=true&fullscreen=true&zoom_in_out=true" style="border-width:; border-style: solid; border-color:;" name="myiframe" id="projectPreview" scrolling="no" frameborder="1" marginheight="0px" marginwidth="0px" height="250" width="500" allowFullScreen></iframe>

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@ -48,11 +48,11 @@ We only need to focus on lines 1, 3, and 5 since they have the output 1:
For each line we construct a Boolean expression that would result in the value in the $f$ column. In other words we construct the function:
| Line | $x$ | $y$ | $z$ | $f$ |
| ---- | --- | --- | --- | ------------------------------------------- |
| 1 | 0 | 0 | 0 | $ \lnot(x) \land \lnot (y) \land \lnot(z) $ |
| 3 | 0 | 1 | 0 | $ \lnot(x) \land y \land \lnot(z) $ |
| 5 | 1 | 0 | 0 | $ x \land \lnot(y) \land \lnot(z) $ |
| Line | $x$ | $y$ | $z$ | $f$ |
| ---- | --- | --- | --- | ----------------------------------------- |
| 1 | 0 | 0 | 0 | $\lnot(x) \land \lnot (y) \land \lnot(z)$ |
| 3 | 0 | 1 | 0 | $\lnot(x) \land y \land \lnot(z)$ |
| 5 | 1 | 0 | 0 | $x \land \lnot(y) \land \lnot(z)$ |
We can now join each expression to create a complex expression that covers the entire truth table using OR: