From 1675099ac95c96223cd51aa0e0e70b70fecebb9c Mon Sep 17 00:00:00 2001 From: tactonbishop Date: Sat, 15 Oct 2022 18:30:05 +0100 Subject: [PATCH] Last Sync: 2022-10-15 18:30:05 --- Hardware/Logic_Gates/Creating_memory_with_NAND.md | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/Hardware/Logic_Gates/Creating_memory_with_NAND.md b/Hardware/Logic_Gates/Creating_memory_with_NAND.md index 0bdf564..a550892 100644 --- a/Hardware/Logic_Gates/Creating_memory_with_NAND.md +++ b/Hardware/Logic_Gates/Creating_memory_with_NAND.md @@ -11,10 +11,12 @@ tags: [logic-gates, binary, memory] The [logic circuit](/Hardware/Logic_Gates/Logic_circuits.md) below demonstrates how memory can be created using [NAND](/Hardware/Logic_Gates/Nand_gate.md) gates. A single bit is stored in memory. -Interactive version of circuit: [https://circuitverse.org/simulator/edit/nand-mem](https://circuitverse.org/simulator/edit/nand-mem) - ![](/img/nand-memory.svg) +Interactive version of circuit: + + + ## Components - **I** is where we input the bit that we want to remember. @@ -57,6 +59,6 @@ When **S** is `ON`, **O** will mirror whatever state **I** is in. However if you The specific reason for this is that, if **S** is `OFF`, both **A** and **B** are `ON` since at Gate 1: `ON (I) + OFF (S) = ON` and `OFF (I) + OFF (S) = OFF` and at Gate 2: `OFF (Gate 1) + OFF (S) = OFF` -This is illustrated in the diagram below. The space occupied by **A** and **B** remains on regardless of the state of **I**. +This is illustrated in the diagram below. The space occupied by **A** and **B** remains on (note it is illuminated) regardless of the state of **I**. ![](/img/nand-mem-demonstrated.gif)