2022-12-12 07:00:05 +00:00
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---
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categories:
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- Electronics
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- Hardware
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tags: [logic-gates, binary, memory, clock]
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---
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# Flip-Flops
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2024-02-02 15:58:13 +00:00
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A flip-flop is a type of
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[latch](/Electronics_and_Hardware/Digital_circuits/Latches.md) that is connected
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to a [clock signal](/Electronics_and_Hardware/Digital_circuits/Clock_signals.md)
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and which executes in time with the clock's pulse. (Sometimes "latch" and
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"flip-flop" are used interchangeably but technically a latch is flip-flop
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without a clock connection.)
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2022-12-12 07:00:05 +00:00
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2022-12-12 07:30:05 +00:00
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## JK Flip-Flop
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2022-12-12 07:00:05 +00:00
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2024-02-02 15:58:13 +00:00
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The JK Flip-Flop (the letters are meaningless) is basically an SR latch in
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functionality. It has a "set" input (_J_) and a "reset" input (_K_) and _Q_ and
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inverted-_Q_ outputs.
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2022-12-12 07:30:05 +00:00
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2024-02-02 15:58:13 +00:00
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Where it differs from the SR is that it the SR will change state just if the
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voltage is high (this, afterall, is all that a bit is) whereas for the JK to set
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it **must receive a clock pulse** and it will only set on the pulse. Hence in
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addition to _J_ and _K_ inputs it has a _CLK_ input for "clock".
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2022-12-12 07:30:05 +00:00
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2024-02-02 15:58:13 +00:00
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In addition the JK Flip-Flop has a **toggle** function. When this is executed,
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whatever _Q_ currently is will be flipped to its opposite value:
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$1 \rightarrow 0$, $0 \rightarrow 1$. The toggle executes when both _J_ and _K_
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are set to high.
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2022-12-12 07:30:05 +00:00
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The possible state changes for the JK Flip-Flop are detailed below:
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2023-06-27 08:31:36 +01:00
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| J | K | Clock | Q state | Operation |
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| --- | --- | ----- | ------------------------- | --------- |
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| 0 | 0 | Pulse | Maintain previous value | Hold |
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| 0 | 1 | Pulse | 0 | Reset |
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| 1 | 0 | Pulse | 1 | Set |
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| 1 | 1 | Pulse | Inverse of previous value | Toggle |
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2022-12-12 07:30:05 +00:00
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2024-02-02 15:58:13 +00:00
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A JK Flip-Flop can execute on either the positive or negative pulse. Below are
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the diagrams for a rising and falling pulse respectively:
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2022-12-13 19:08:20 +00:00
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2022-12-29 20:22:34 +00:00
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2022-12-13 19:08:20 +00:00
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2022-12-12 07:53:34 +00:00
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## T Flip-Flops
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2024-02-02 15:58:13 +00:00
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Another type of Flip-Flop can be created by connecting the _J_ and _K_ inputs of
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a JK Flip-Flop to each other. This reduces the possible states to two: toggle
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current state or maintain current state. Its overall logic is therefore reduced
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to just two lines of the previous state table: the state that obtains when _J_
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and _K_ are $0 0$ or $1 1$.
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Thus the state table for the T Flip-Flop is:
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2023-06-27 08:31:36 +01:00
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| T | Clock | Q state | Operation |
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| --- | ----- | ------------------------- | --------- |
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| 0 | Pulse | Maintain previous value | Hold |
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| 0 | Pulse | Inverse of previous value | Toggle |
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2022-12-12 07:53:34 +00:00
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2022-12-29 20:22:34 +00:00
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