2024-12-09 18:34:15 +00:00
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---
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tags: [memory, CPU]
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created: Friday, July 12, 2024
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---
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# Register and cache memory
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The CPU has its own memory devices in the form of registers and cache memory.
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2025-01-17 17:56:09 +00:00
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[Registers](CPU_architecture.md#Registers) are a form of memory that are
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2024-12-09 18:34:15 +00:00
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positioned on the same chip as the CPU. They are very fast but can only store a
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small amount of data. They are used to store the results of calculations and the
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addresses of the next instructions to be processed.
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The cache is SRAM memory that is separate from the DRAM memory which comprises
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the main memory. It exists in order to boost perfomance when executing the
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read/request cycles of the steps detailed above.
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There are two types of cache memory:
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- L1 cache
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- Situated on the CPU chip itself
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- Fastest to access but stores less
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- L2 cache
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- Situated outside of the CPU on its own chip
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- Slower to access than L1 but can store more data
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The L1 cache is the fastest since the data has less distance to travel when
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moving to and from the CPU. This said, the L2 cache is still very fast when
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compared to the main memory, both because it is SRAM rather than DRAM and
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because it is closer to the processor than the main memory.
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Cache controllers use complex algorithms to determine what should go into the
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cache to facilitate the best performance, but generally they work on the
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principle that what has been previously used by the CPU will be requested again
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soon. If the CPU has just asked for an instruction at memory location 555 it's
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very likely that it will next ask for the one at 556, and after that the one at
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557 and so on. The cache's controller circuits therefore go ahead and fetch
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2025-01-16 07:08:09 +00:00
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these from slow [DRAM to fast SRAM](DRAM_and_SRAM_memory.md).
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